Bug Fixes
- General: There was a bug with the Create Composite Load Model tool which expanded a load model into load pieces along with the transformer and feeder. This issue is now fixed and the tool will split the composite load model into individual components without the bug.
- Transient Stability: Modified the CHVDC2 model to ensure enough subinterval integration timesteps are used for large Kir or Kii paramters for for very small time delays in the model.
- Transient Stability: When reading a CHVDC2 model from a DYR file, we now populate several fields in the extra DCLine model fields which are needed to properly write back out an EPC/DYD file pair that matches the system behavior.
- Transient Stability: The DYD file CHVDC2 record does not have several input parameters because these are stored in the EPC file DCLine and DC converter records. Because the DYR file stores this information, we must write that data into the appropriate location so we can write out an EPC/DYD file pair. This includes: DC line inductance, capacitance, converter smoothing inductance, DC margin at inverter, converter current rating, Max and Min alpha at the rectifier, and minimum alpha at the inverter.