Exciter Model: ST7C

 

Following checks and corrections are applied during Validation and AutoCorrection.

  • If 0.0 < Tr < 0.25*Mult*TimeStep then Tr = 0.0
    ElseIf 0.25*Mult*TimeStep < Tr < 0.5*Mult*TimeStep then Tr = 0.5*Mult*TimeStep
  • If 0.0 < Ta < 0.5*Mult*TimeStep then Ta = 0, ElseIf 0.5*Mult*TimeStep < Ta < Mult*TimeStep then Ta = Mult*TimeStep
  • If Vrmax < Vrmin then swap the values
  • If Vmax < Vmin then swap the values

Mult represents the user-specified value Minimum time constant size as multiple of time step option on the Validation page of the Transient Stability Dialog

TimeStep represents the integration time step being used as described on TimeStep

Following treatment is handled during the transient numerical simulation

  • If Efd > Vrmax, then Vrmax = Efd or if Efd < Vrmin, then Vrmin = Efd
  • If Vfb > Vmax, then Vmax = Vfb or if Vfb < Vmin, then Vmin = Vfb

Model Equations and/or Block Diagrams

Parameters:

OEL OEL input selector: 1 – add to Vref, 2 – input LV gate, 3 – output LV gate, 0 – no OEL input
UEL UEL input selector: 1 – add to Vref, 2 – input HV gate, 3 – output HV gate, 0 – no UEL input
Tr Filter time constant, sec.
Tg Input lead-lag numerator time constant, sec.
Tf Input lead-lag denominator time constant, sec.
Vmax Maximum voltage reference signal, p.u.
Vmin Minimum voltage reference signal, p.u.
Kpa Regulator proportional gain, p.u. (> 0.)
Vrmax Maximum field voltage output, p.u.
Vrmin Minimum field voltage output, p.u.
Kh High-value gate feedback gain, p.u.
Kl Low-value gate feedback gain, p.u.
Tc Lead-lag numerator time constant, sec.
Tb Lead-lag denominator time constant, sec.
Kia Feedback gain, p.u.. (> 0.)
Tia Feedback time constant, sec..
Ta Thyristor bridge firing control equivalent time constant