Exciter Model: AC9C
Following checks and corrections are applied during Validation and AutoCorrection.
- If 0 < Te < Mult*TimeStep then Te = Mult*TimeStep
- If 0.0 < Ta < 0.5*Mult*TimeStep then Ta = 0, ElseIf 0.5*Mult*TimeStep < Ta < Mult*TimeStep then Ta = Mult*TimeStep
- If 0.0 < Tf < 0.5*Mult*TimeStep then Tf = 0, ElseIf 0.5*Mult*TimeStep < Tf < Mult*TimeStep then Tf = Mult*TimeStep
- If 0.0 < Tdr < 0.5*Mult*TimeStep then Tdr = 0, ElseIf 0.5*Mult*TimeStep < Tdr < Mult*TimeStep then Tdr = Mult*TimeStep
- If 0.0 < Tr < 0.25*Mult*TimeStep then Tr = 0.0
ElseIf 0.25*Mult*TimeStep < Tr < 0.5*Mult*TimeStep then Tr = 0.5*Mult*TimeStep - If Vrmax < Vrmin then swap the values
- If Vamax < Vamin then swap the values
- If Vpidmax < Vpidmin then swap the values
- If VFWmax < VFWmin then swap the values
Mult represents the user-specified value Minimum time constant size as multiple of time step option on the Validation page of the Transient Stability Dialog
TimeStep represents the integration time step being used as described on TimeStep
Following treatment is handled during the transient numerical simulation
- If Vr > Vrmax, then Vrmax = Vr limits or if Vr < Vrmin, then Vrmin = Vr
- If VFW > VFWmax, then VFWmax = VFW limits or if VFW < VFWmin, then VFWmin = VFW
- If Va > Vamax, then Vamax = Va limits or if Va < Vamin, then Vamin = Va
- If IFDref > VPIDmax, then VPIDmax = IFDref limits or if IFDref < VPIDmin, then VPIDmin = IFDref
Model Equations and/or Block Diagrams
Parameters:
| OEL | OEL input: if < 2, add to error signal; if = 2, LV gate 1; if = 3, LV gate 2 |
| UEL | UEL input: if < 2, add to error signal; if = 2, HV gate 1; if = 3, HV gate 2 |
| SCL | SCL input: if < 2, add to error signal; if = 2, LV gate 1; if = 3, LV gate 2 |
| SW1 | Logical switch 1 (1 = Position A, 2 = Position B) |
| Tr | Filter time constant, sec |
| Kpr | Proportional gain, pu |
| Kir | Integral gain, pu |
| Kdr | Regulator derivative gain, pu |
| Tdr | Derivative gain washout time constant, sec |
| Vpidmax | PID maximum limit |
| Vpidmin | PID minimum limit |
| KPA | Potential source gain, pu |
| KIA | Potential circuit (current) gain coefficient |
| VaMax | Maximum control element output, pu |
| VaMin | Minimum control element output, pu |
| Ka | Voltage regulator gain |
| Ta | Voltage regulator time constant, sec |
| Vrmax | Maximum exciter control signal, pu |
| Vrmin | Minimum exciter control signal, pu |
| KF | Rate feedback gain, pu |
| Tf | Rate feedback constant, sec |
| KFW | Gain for VFW |
| VFWmax | VFW Maximum |
| VFWmin | VFW Minimum |
| SCT | User select parameter: SCT not 0 - Represent thyristor bridge; 1 - Represents a chopper converter |
| KC | Rectifier loading factor proportional to commutating reactance |
| Kd | Exciter internal reactance, pu |
| Ke | Exciter field resistance constant, pu |
| Te | Exciter field time constant, sec |
| Vfemax | Exciter field current limit parameter, pu |
| Vemin | Minimimum exciter output voltage, pu |
| E1 | Field voltage value, 1 |
| SE1 | Saturation factor at E1 |
| E2 | Field voltage value, 2 |
| SE2 | Saturation factor at E2 |
| KP | Potential source gain, pu |
| KI1 | Potential circuit (current) gain coefficient |
| KI2 | Potential circuit (current) gain coefficient |
| KC1 | Rectifier loading factor proportional to commutating reactance |
| KC2 | Rectifier loading factor proportional to commutating reactance |
| XL | Reactance associated with potential source |
| ThetaP | Potencial circuit phase angle, degrees |
| VbMax1 | Maximum available exciter field voltage |
| VbMax2 | Maximum available exciter field voltage |
| Vlim1 | Power type stage selector vlim1 |
| Vlim2 | Power type stage selector vlim2 |
| Spdmlt | If not zero, multiply output (Efd) by generator speed |