DC Line Model: CHATGY
AutoCorrection Properties
To be documented.
Model Equations and/or Block Diagrams
For a Detailed Treatment of how DC lines are implemented in the software see the help topic here.
Parameters:
| Direction | Set to >= 0 for the forward direction; Set to < 0 for reverse direction |
| BR_Cntl | Set to 0 to disable the Bang-Ramp limit |
| LVCL_Cntl | Specify input voltage to low voltage current order limit (LVCL). 0 : disables LVCL; 1 : use filtered rectifier AC per unit voltage; 2 : user filtered inverter AC per unit voltage |
| CSP_Cntl | Set to 0 disables the CSP stabilizing power |
| ISW | >=0 to subtract second signal from first; <0 to subtract first signal from second (CHAAUT) |
| ALFRMIN | Minimum alpha for dynamics |
| TIR | Desired Current Output Time Constant (sec) |
| TACV | AC Voltage Transducer Time Constant (sec) |
| TPR | Power Reg Time Constant (sec) |
| TMPI | AC Power Transducer (sec) |
| PIPOS | Power Regulate Loop Max (MW) |
| PINEG | Power Regulate Loop Min (MW) |
| TOverAllow | Overload Time Allowed (sec) |
| TOverDelay | Power Overload Initiation Delay (sec) |
| IMAX | Max Continuous Current (amps) |
| C0 | Minimum Current Demand (amps) |
| V1 | V Limit Point 1 (AC pu) |
| C1 | Current Limit Point 1 (amps) |
| V2 | V Limit Point 2 (AC pu) |
| C2 | Current Limit Point 2(amps) |
| V3 | V Limit Point 3 (AC pu) |
| C3 | Current Limit Point 3(amps) |
| VDEBLK | Rectifier AC Volt Cause Blk |
| VUNBL | Rect AC Unblock V (pu) |
| VINBLK | Inverter Block V (pu) |
| VIUNB | Inverter AC Unblock V (pu) |
| TDEBLK | Time Delay for Block (sec) |
| TREBLK | Delay After AC Volt Recovers (sec) |
| RampDown | Ramp Rate Down (kA/sec) |
| RampUp | Generator Ramp Rate Up (kA/sec) |
| BR_I | Current Bang-Ramp (A) |
| BR_V | AC per unit Volt Bang-Ramp Activate (pu) |
| BR_TD | Time for Decrease Bang-Ramp (sec) |
| BR_TU | Time for Increase Bang-Ramp (sec) |
| BR_TBOT | Time for bottom for Bang-Ramp (sec) |
| BR_Tdelay | Bang-Ramp Init delay (sec) |
| BR_Ireset | Bang-Ramp reset current (A) |
| BR_Max | Bang-Ramp max number of bangs |
| CSP_T1 | CSP – Beau Modulation (sec) |
| CSP_T2 | CSP – Beau Modulation (sec) |
| CSP_T3 | CSP – Beau Modulation (sec) |
| CSP_K | CSP Gain – Beau Modulation (sec) |
| CSP_Lp | CSP Lmt – Beau Modulation (sec) |
| CSP_Ln | CSP Lmt – Beau Modulation (sec) |
| Vramp | Voltage ramp-up (kV/sec) |
| Cramp | Current ramp-up (kA/sec) |
| TLVCLI | Transducer time constant at inverter for LVCL (sec) |
| TLVCLR | Transducer time constant at rectifier for LVCL (sec) |
| RISERATE_LVCL | LVCL Bottom Line Rise Rate (A/sec) |
| FP1 | Signal 1 positive frequency deviation dead band threshold (Hz) (CHAAUT) |
| FN1 | Signal 1 negative frequency deviation dead band threshold (Hz) (CHAAUT) |
| MP1 | Signal 1 positive slope (MW/Hz) (CHAAUT) |
| MN1 | Signal 1 negative slope (MW/Hz) (CHAAUT) |
| KP1 | Signal 1 Proportional Gain (CHAAUT) |
| KD1 | Signal 1 Derivative Gain (CHAAUT) |
| T1 | Signal 1 first time constant (sec) (CHAAUT) |
| T2 | Signal 1 second time constant (sec) (CHAAUT) |
| FP2 | Signal 2 positive frequency deviation dead band threshold (Hz) (CHAAUT) |
| FN2 | Signal 2 negative frequency deviation dead band threshold (Hz) (CHAAUT) |
| MP2 | Signal 2 positive slope (MW/Hz) (CHAAUT) |
| MN2 | Signal 2 negative slope (MW/Hz) (CHAAUT) |
| KP2 | Signal 2 Proportional Gain (CHAAUT) |
| KD2 | Signal 2 Derivative Gain (CHAAUT) |
| T3 | Signal 2 first time constant (sec) (CHAAUT) |
| T4 | Signal 2 second time constant (sec) (CHAAUT) |
| DPDTMX | Signal 1 Rate Limit Maximum (MW/sec) (CHAAUT) |
| DPDTMN | Signal 1 Rate Limit Minimum (MW/sec) (CHAAUT) |
| TM1 | Signal 1 transducer time constant (sec) (CHAAUT) |
| TM2 | Signal 2 transducer time constant (sec) (CHAAUT) |
| P1POS | Signal 1 Maximum (MW) (CHAAUT) |
| P1NEG | Signal 1 Minimum (MW) (CHAAUT) |
| P2POS | Signal 2 Maximum (MW) (CHAAUT) |
| P2NEG | Signal 2 Minimum (MW) (CHAAUT) |